Characterization and Modeling of Quantum Dot Behavior in FDSOI Devices

A compact analytical model is proposed along with a parameter extraction methodology to accurately capture the steady-state (DC) sequential tunnelling current observed in subthreshold region of transfer IDS-VGS characteristics MOSFETs at cryogenic temperatures. The shown match measurements p-MOSFETs and n-MOSFETs manufactured commercial 22nm FDSOI foundry technology, reasonable accuracy across bias conditions temperature (2 K -50 K). Furthermore, extracted parameters are used analyze impact gate drain voltages layout geometry on device characteristics.